CPU-SoC Mask Layout Designer

Intel Corporation

CPU-SoC Mask Layout Designer involved in design and development of next generation SOC/CPU at Intel. Creating mask layouts and verifying design specifications for multiple projects.

Posted 5/19/2026full-timePenang • 🇲🇾 MalaysiaMid-LevelSeniorWebsite

ATS Keywords

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Hard Skills

VLSI DesignSOC ArchitectureSystem VerilogDesign VerificationMask LayoutsPower Grid DesignFloorplan DesignReliability ChecksTroubleshootingProcess Design Rules

Soft Skills

CommunicationCollaborationProblem Solving

Tools & Technologies

Unix

Certifications & Qualifications

Diploma in Electronic and Electrical Engineering

Industry Keywords

Integrated CircuitsElectron MigrationVoltage Drop (IR)ESDStakeholder Management

Tech Stack

Tools & technologies

ElectronUnix

About the role

Key responsibilities & impact

Involving in the training, design and development of next generation SOC/CPU for wide range of Intel products
Creates mask layouts of integrated circuits for a given specification
Runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks
Creates accurate designs that meet project needs
Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues
Designs and analyzes floorplans, power grid, and bumps
Troubleshoots a wide variety of issues up to and including layouts and tool/flow/methodology used in layout design

Requirements

What you’ll need

Diploma in Electronic and Electrical Engineering or related major with good CGPA
Good communication skills and proficient in English
Knowledge on Unix, VLSI Design, SOC/PC Architecture, System Verilog is major plus

Benefits

Comp & perks

Flexible work arrangements
Professional development opportunities