PERC ESD EDA Engineer

Intel Corporation

PERC ESD EDA Engineer at Intel developing ESD/LU rule decks and collaborating with design teams. Responsibilities include rule debugging, QA automation, and enhancement of verification tools.

Posted 6/11/2026full-timeHillsboro • Arizona, California, Oregon, Texas • 🇺🇸 United StatesJunior💰 $111,030 - $211,200 per yearWebsite

ATS Keywords

Tailor your resume

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills

ESD design rule methodologiesLU design rule methodologiestest case developmentQA requirements definitionautomation for rule checksscriptingPythonTclPerlphysical design verification

Soft Skills

collaborationleadershipproblem-solvinginnovation

Tools & Technologies

EDA toolsreliability toolsDRC tools

Certifications & Qualifications

Master's degree in Electrical EngineeringPhD in Electrical EngineeringSTEM degree

Industry Keywords

reliabilitydevice physicsprocess technologydesign rulesextraction

Tech Stack

Tools & technologies

PerlPython

About the role

Key responsibilities & impact

Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements
Create and maintain reliability ESD and LU design rule methodologies and specifications
Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements
Build and execute test cases for rule debugging, validation, and signoff
Define QA requirements and drive related automation to improve robustness and efficiency of rule checks
Lead innovation initiatives to enhance existing ESD/LU verification automation, tools, and methodologies
Identify and analyze ESD/LU design problems, define root causes, and drive practical solutions across teams

Requirements

What you’ll need

Master's degree or PhD in Electrical Engineering, Computer Engineering or other relevant STEM degree
1+ years of relevant industry experience in physical design verification (reliability, device physics, process technology, and design rules, extraction or related domains)
1+ years' experience with ESD PERC rule decks/runset development and debugging (or equivalent reliability/DRC tools)
1+ years' experience in scripting (e.g., Python, Tcl, Perl, or similar) for QA and flow automation

Benefits

Comp & perks

Health insurance
Retirement plans
Paid time off
Flexible work arrangements
Professional development programs
Bonuses
Stock options