Senior CPU RTL Design Engineer – Power Management

Intel Corporation

Senior CPU RTL Design Engineer in Intel's CPU Design Team architecting power-efficient processors. Collaborating with teams to deliver industry-leading silicon in a fast-paced environment.

Posted 6/23/2026full-timeAustin • Arizona, Texas • 🇺🇸 United StatesSenior💰 $164,470 - $269,100 per yearWebsite

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

CPU microarchitectureRTLSystemVerilogVerilogPPA optimizationmulti-clock domain designCDC solutionspower managementlow-power designSoC RTL design

Certifications & Qualifications

Bachelor's degree in Electrical EngineeringBachelor's degree in Computer EngineeringBachelor's degree in Computer ScienceMaster's degree in Electrical EngineeringMaster's degree in Computer EngineeringMaster's degree in Computer Science

Industry Keywords

DVFSpower statespower budgetingdebugsystem-level design

About the role

Key responsibilities & impact

Define, design, and implement CPU microarchitecture features
Develop and deliver RTL (SystemVerilog/Verilog) for CPU IP blocks
Drive power, performance, and area (PPA) optimization
Design and validate multi-clock domain and CDC solutions
Contribute to CPU power management features

Requirements

What you’ll need

Bachelor's degree in Electrical/Computer Engineering, Computer Science or related field with 9+ years of relevant experience
Master's degree in the same field with 7+ years of experience
Experience with power management concepts (e.g., DVFS, power states, budgeting)
Experience in low-power / power-aware CPU or SoC RTL design
RTL development (Verilog/SystemVerilog)
Debug and system-level design understanding

Benefits

Comp & perks

Competitive pay
Stock bonuses
Benefit programs which include health, retirement, and vacation