High Speed PHY System Architect

Intel Corporation

Architecting analog and mixed-signal IP for system-on-chip solutions at Intel. Responsible for high performance designs and system-level validation with a focus on collaboration and innovation.

Posted 6/27/2026full-timeSanta Clara • California, Oregon • 🇺🇸 United StatesSeniorLead💰 $164,470 - $311,890 per yearWebsite

Core Competencies

Role fit

Core Competencies

Use this summary to align your resume positioning with the role.

The ideal candidate must demonstrate expertise in analog and mixed-signal circuit design, with a strong ability to collaborate across teams to develop and validate robust IP architectures. A focus on innovative problem-solving and optimization for performance, power, and area in system-on-chip designs is essential.

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Analog Circuit DesignMixed-Signal Circuit DesignSignal Processing AlgorithmsCalibration AlgorithmsTransistor-Level Feasibility StudiesArchitectural Feature DefinitionHigh-Speed Design TechniquesAnalog Behavior ModelingSystem-Level Understanding of AMS CircuitsHigh Speed PHY Designs

Soft Skills

CollaborationProblem-SolvingInnovative ThinkingAnalytical SkillsCommunication

Tools & Technologies

Backend Verification ToolsMonte Carlo SimulationsModeling and Simulation ToolsAMS System Modeling

Industry Keywords

System-on-Chip (SoC)Analog Mixed-Signal (AMS)CMOS TechnologiesPower OptimizationPerformance MetricsCross-Functional CollaborationEmerging Technology Trends

About the role

Key responsibilities & impact

Develop and drive analog and mixed-signal IP architectures, signal processing algorithms, and calibration algorithms for system-on-chip (SoC) independent AMS IPs
Conduct top-down architectural analysis of AMS systems and perform transistor-level feasibility studies for various AMS circuits
Design novel architectures and define microarchitectures for next-generation AMS IP to achieve optimal performance, power, and area for diverse product segments
Enhance system performance by leveraging digitally assisted analog techniques and optimizing the partitioning of analog and digital circuits
Evaluate trade-offs, explore innovative approaches, and provide proof-of-concept design alternatives for AMS systems
Collaborate with IP design and verification teams to define, develop, and validate robust AMS IPs for SoC integration
Support SoC architects, design engineers, and verification engineers in selecting, configuring, and validating SoCs that leverage AMS IPs
Perform modeling, simulation, and optimization for power, area, and performance metrics, analyzing test results to identify improvement opportunities
Define future AMS IP technology targets by influencing cross-functional roadmaps and reviewing emerging technology trends.

Requirements

What you’ll need

Bachelor's degree in Electrical Engineering, Computer Engineering, or related STEM field with 9+ years of experience
OR Master's degree in Electrical Engineering, Computer Engineering, or related STEM field with 6+ years of experience
OR PhD in Electrical Engineering, Computer Engineering, or related STEM field with 3+ years of experience
Analog and mixed-signal circuit design within standard CMOS technologies
Backend verification tools such as Monte Carlo simulations
Analog behavior modeling and system-level understanding of AMS circuits
Hands-on experience with transmission line theory and AMS system modeling
Architectural feature definition, high-speed design techniques, and IP architecture definition
Proven experience with high speed PHY designs from concept through qualification.

Benefits

Comp & perks

competitive pay
stock bonuses
health, retirement, and vacation benefits