Intel Corporation

Mechanical Engineer

• Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU.
• Participate in defining the architecture and microarchitecture features of the CPU design.
• Write RTL and optimize logic for power, performance, area, and timing goals.
• Ensure design integrity for physical implementation through effective strategies, tools, and methods.
• Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
• Document microarchitectural specifications (MAS) for the CPU features.
• Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block.

CPU RTL Design Engineer

Full-stack Engineer

• Contribute to building infrastructure and tooling that supports an end‑to‑end evaluation ecosystem for agentic AI frameworks
• Build and maintain scalable deployment and orchestration systems for AI workloads
• Develop data pipelines, dashboards, and observability tooling
• Integrate and evaluate AI agent frameworks and model‑serving systems
• Design and automate evaluation pipelines for performance, reliability, and regression detection
• Collaborate with global engineering teams to improve AI evaluation tooling

AI Software Engineer – Agentic AI System

Application Engineer

• Develop cloud and hybrid-cloud applications using frameworks from internal and external cloud providers like Amazon Web Services, Google Cloud, and Azure
• Architect and coordinate cloud solutions across areas such as application development, identity and access management, network and data management, and security
• Define and implement DevSecOps solutions, linking them to cloud platforms and ensuring adherence to security standards
• Drive the implementation of DevOps processes, automation, and culture for application deployment and infrastructure maintenance
• Build and design web services in the cloud while orchestrating and automating cloud-based platforms
• Develop responsive frontend interfaces for applications that run on mobile and PC form factors utilizing technologies like HTML5, TypeScript, and JavaScript frameworks (React, Angular, Bootstrap)
• Troubleshoot and resolve technical issues, identify root causes, and implement preventive measures to ensure high application performance and scalability
• Educate and mentor multidisciplinary teams on cloud-based solutions and best practices, fostering collaboration and technical growth.
• Define and document strategies for infrastructure maintenance and application deployment, ensuring alignment with company guidelines.

Cloud Application Development Engineer

Software Engineer

• Lead CMP process development from concept through HVM implementation across multiple advanced technology nodes
• Drive standardization and best practices across Intel's technology portfolio to maximize efficiency and yield
• Own and resolve complex CMP-related yield and manufacturing issues using data-driven approaches and structured problem-solving methodologies
• Align technical strategies with customer requirements and business objectives, ensuring on-time delivery of robust solutions
• Bridge technology development and manufacturing teams to ensure smooth transition of CMP processes to production
• Drive ongoing optimization initiatives to enhance process capability, yield, and manufacturing efficiency
• Work closely with Integration, Device, Yield, Factory, Quality, and Customer Engineering teams
• Collaborate with equipment and consumables suppliers to co-develop and optimize CMP solutions
• Mentor junior engineers and provide technical guidance across the organization

Senior Member of Technical Staff, Engineer

• Joining the Quantum System Architecture & Software team in the Intel Quantum Computing program
• Leads the creation, implementation, and optimization of software codes for Intel quantum hardware constraints
• Lead the research and development of quantum error correction protocols for fault tolerant quantum computing systems
• Explore hardware/software trade-offs in the implementation of quantum error correcting codes with algorithm and application researchers, software and hardware engineers

Quantum Error Correction Software Engineer

Artificial Intelligence

• Designs and builds generative AI agents and AI platforms leveraging local and cloud-based large language models (LLMs)
• Develops AI-powered products and solutions for intelligent reasoning, automation, and human-AI interaction
• Collaborates with users and stakeholders to define requirements and deliver impactful AI solutions
• Responsible for end-to-end development, including implementation, testing, debugging, documentation, and deployment of AI services, tools, and platforms

AI Algorithm Engineer

• Drive yield and defect improvement initiatives across Intel's advanced packaging technology portfolio.
• Lead efforts to identify, analyze, and resolve yield-limiting mechanisms throughout technology development and high-volume manufacturing (HVM).
• Collaborate with large-scale datasets, advanced analytics, and cross-functional engineering teams to improve manufacturing processes.
• Establish team priorities and influence technical roadmaps to achieve key yield milestones.

Senior Yield Analysis Engineer / Team Leader

Solutions Engineer

• onboard, measure, analyze, and optimize the performance, quality, and efficiency of AI and non-AI workloads on Intel DCG platforms, including CPU (Xeon), GPU, and NPU
• Run benchmarks to measure latency, throughput, and memory usage
• Identify bottlenecks and create detailed reports, dashboards, and visualizations for performance data
• Build automated benchmarking pipelines to ensure reproducible results
• Work with internal and external stakeholders to optimize systems based on benchmark outcomes

Software Solutions Engineer

Engineer

• Contribute to the development and validation of Intel’s next‑generation CPU designs
• Work with pre‑silicon models, simulation tools, and verification environments
• Perform functional verification of CPU logic
• Develop verification plans and test benches
• Execute verification plans and run system-level simulations
• Debugging presilicon failures, partnering with design teams
• Improve verification infrastructure, tools, automation, and methodology
• Document test plans and results, participating in reviews

Junior CPU Verification Engineer

Architect

• Contribute to silicon solutions definition and architecture
• Assist in modeling and simulation
• Support feasibility and specification development

Silicon Architecture Graduate Intern

• Ensure the availability, reliability, and maintenance of mechanical and HVAC systems critical to supporting data centers, labs, and facility operations
• Support daily efforts to achieve safety, reliability, and environmental compliance objectives
• Design and analyze mechanical systems and equipment, troubleshoot systemic issues, and provide evaluation, recommendations, and solutions
• Develop engineering scopes of work for mechanical projects, conduct feasibility studies, and review and evaluate designs
• Oversee industrial instrumentation and automation systems for maintenance and troubleshooting
• Ensure all work adheres to relevant health and safety regulations and quality standards
• Conduct root cause failure analysis and manage long-term improvement initiatives
• Act as a partner to business units providing engineering solutions for equipment and systems
• Develop and execute a systems roadmap and asset replacement strategy
• Guide and mentor other engineers

Facilities Mechanical and Controls Engineer – Data Center

• Design, develop, and implement analog circuits and mixed-signal IPs, including ADCs, DACs, voltage regulators, and high-speed I/O interfaces
• Perform circuit-level design, simulation, and optimization to meet power, performance, area, timing, and yield requirements
• Create and validate floorplans, extract chip parameters, and simulate analog behavior models to ensure robust designs
• Develop test plans for design verification and evaluate test results to meet specification requirements
• Collaborate with architecture and layout teams to design circuits that maximize functionality, robustness, and electrical capabilities
• Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon implementation
• Analyze and resolve performance and circuit-related issues during design and post-silicon validation phases
• Serve as a technical interface to process technology, IP engineers, and product teams, leveraging design insights to influence future process node development

Analog Engineer

Business Intelligence Analyst

• collaborate with internal clients and business units to identify and analyze business needs, requirements, and opportunities for process improvements
• design and document business process flows, including diagrams, flowcharts, functional specifications, use cases, and user stories
• evaluate the feasibility of proposed solutions, conduct design due diligence, and assess business value and risks
• lead end-to-end business process testing, validation, and sign-off for complex implementations
• provide technical advice on industry standards, design principles, user interface specifications, and configuration parameters
• partner with subject matter experts, vendors, and partner organizations to deliver project milestones such as requirements gathering, process mapping, testing, documentation, and training
• monitor adoption and manage business process change, ensuring alignment with business goals through reporting, analysis, and analytics dashboards
• establish key performance indicators to assess progress and performance in alignment with business plans
• support training initiatives and ensure smooth delivery of new or updated processes to stakeholders

Business Analyst

Engineering Manager

• Lead and manage a group of IC Packaging Engineers, providing guidance, mentorship, and support to ensure the successful execution of projects.
• Oversee the planning, scheduling, and execution of package design projects, ensuring that milestones and deadlines are met.
• Foster a collaborative and innovative team environment, encouraging continuous learning and professional development.
• Lead design groups, coordinating efforts across multiple teams to achieve project goals.
• Serve as the primary package design technical lead and guide customers through end-to-end package design flow.
• Drive the development of advanced packaging designs, ensuring compliance with industry standards and best practices.
• Collaborate with cross-functional teams, including package architects, silicon and board design teams, design rule owners, electrical analysis engineers, and integration teams to define and implement design specifications.
• Ensure products are designed and developed with high quality standards by overseeing design processes, risk management, and compliance throughout the product design lifecycle, working closely with cross-functional teams to identify and address potential quality issues before they arise.
• Develop and maintain detailed project plans, including resource allocation, risk management, and progress tracking.
• Coordinate with stakeholders to ensure alignment on project goals, deliverables, and timelines.

Silicon Packaging Engineering Manager

• create, enable and support Scan/Chain Diagnosis infrastructure and processes for Intel's HVM products
• support fail-based and volume diagnostic analysis and yield analysis requests
• develop and optimize tools, methods, and flows for Design for Test (DFT), diagnostics, and yield analysis
• collaborate with external vendors and internal teams to establish standard industry practices