Intel Corporation

Designer

• Lead cross functional teams across process integration/ device/ yield/ design/OPC/RET/DR and DTP/CAD teams to define and enhance Design for Manufacturability rules for enhanced yield /performance and faster ramp on advanced logic technologies
• Enhance and feed silicon learning / sighting of yield issues for design teams to update layout /DTCO methodologies, flows to capture yield issues early in the design process
• Work and refine yield tools/flows inside foundry and help in inline yield detection and optimization
• Define/Refine DFM methodologies by understanding silicon process flows and predicting and developing rules for avoiding layout and design marginalities by working with cross functional teams

Collateral Design and DFM Engineer

Civil Engineer

• Support development and maintenance of the FASTR database, including field audits and data verification activities
• Participate in field validation efforts, including Point of Connection (POC) lateral X/Y verification, to ensure alignment between design and as-built conditions
• Assist with the testing and validation of new GCE Optimizer software, documenting results and supporting issue resolution
• Support P/ID updates and assist with lateral design development for upcoming construction scopes
• Review and merge vendor drawings with Intel Plan of Record (POR) and lateral reference packages (RPs)
• Assist in creating and maintaining a central repository for 2D and 3D engineering content to support design and construction teams

Construction Engineering Intern

DevOps Engineer

• Assess intrinsic and extrinsic reliability of photonic devices and ICs
• Conduct DOEs to develop reliability models
• Collaborate with cross-functional teams on quality aspects of SiPh technology development
• Determine root causes of failures from reliability testing

Senior Silicon Photonics TD Reliability Engineer

Mechanical Engineer

• Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
• Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Provide technical leadership and support to the design team leadership including proposing creative, innovative methodology and process initiatives to consistently improve efficiency and quality.
• Work closely with architecture and backend teams and with other design teams towards achieving best-in-class products.
• Build a strong and technically vital organization. Cultivate and reinforce appropriate group values, norms and behaviors.

Senior CPU RTL Design Engineer

• Architect, design, and test complex mixed-signal system-on-chip (SoC) and FPGA solutions that interface the microinstruction layer of the quantum computing stack to actual qubits
• Generate complex control signals required to drive and read qubit states with precision and reliability
• Perform signal integrity analysis and optimization for qubit chips to ensure optimal performance
• Apply electromagnetic (EM) modeling and simulation tools for signal integrity and crosstalk analysis
• Work in close collaboration with both software/algorithms and qubit development teams to create integrated solutions
• Bridge the gap between quantum physics and practical electronic implementation

Qubit Control IC Designer

Architect

• Drives end-to-end development for substrate design from concept through tape out
• Implements physical layout and routing of the package design
• Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs
• Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout
• Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design
• Completes documentation and collateral into the product lifecycle management system of record

Packaging Design Architect

• Define and own the thermal architecture for complex electronic systems
• Develop thermal budgets, airflow strategies, and cooling solutions
• Lead CFD and FEA thermal simulations using tools such as Ansys Icepak, FloTHERM, 6SigmaET, or COMSOL
• Drive trade-off analyses between thermal performance, acoustics, cost, weight, and form factor
• Partner with silicon and power teams to influence chip floorplans, package selection, and power delivery for thermal optimization
• Specify and qualify thermal interface materials (TIMs), heatsinks, fans, pumps, cold plates, and related components
• Lead thermal characterization, bring-up, and validation in the lab; correlate models to measured data
• Mentor junior thermal engineers and establish best practices, design guidelines, and review processes
• Engage with suppliers and ODM/OEM partners on thermal design reviews and DFx activities
• Represent thermal engineering in cross-functional architecture reviews and executive readouts.

Senior Thermal Architect

• Assist in designing, simulating, and verifying digital and/or analog circuits to meet Intel's high-performance standards
• Contribute to schematic entry, timing analysis, and optimization for power, performance, and area
• Perform noise glitch and signal integrity analysis to ensure robust circuit designs
• Collaborate with cross-functional teams to identify and implement innovative solutions for low-power and high-performance designs
• Perform debugging, hardware simulations, and circuit testing to validate design functionality
• Utilize and navigate EDA tools to execute floor planning and clock gating tasks
• Apply semiconductor device physics knowledge to analyze and improve circuit tradeoffs
• Continuously learn, adapt, and contribute to process improvements in alignment with Intel's culture of innovation

Analog Circuit Design Engineer – Graduate Intern

Marketing

• Contribute to the development and execution of marketing strategies across brand, product, content, and campaign domains.
• Assist with market research, content creation, and performance tracking to support Intel's brand positioning and customer engagement.
• Collaborate with cross-functional teams to deliver impactful marketing initiatives across digital and traditional channels.
• Learn and apply knowledge, build skills, and explore future career opportunities through hands-on experience and projects that support Intel's business goals in a collaborative environment.
• Support the Channel Marketing Manager in overseeing the end-to-end MDF lifecycle.
• Ensure all partner marketing activities align with the Outcome-Based Guidebook and corporate brand guidelines throughout the campaign execution process until funds are released.
• Monitor campaign execution and unspent funds, and proactively recommend reallocation of expiring budgets.
• Act as the internal point of contact for partners, coordinating with our third-party agency.
• Develop and maintain dashboards that track the performance of MDF-funded partner activities.

Partner Marketing Support Intern

Solutions Engineer

• Collaborate with the sales team throughout the sales cycle
• Design and propose customized telecom solutions
• Craft presentations and demonstrations that showcase Intel's value proposition
• Gather and transform partner requirements for 5G network infrastructure
• Conduct deep dive technical training of Intel 5G network infrastructure

Solution Architect – Telco

• Supporting memory PHY development across various technical domains
• Package layout
• Electrical modelling
• Signal and power integrity simulation

Graduate Talent – Analog Design Engineer

Engineer

• Collaborate with organizational leadership and cross-functional teams to analyze complex business data, identify risks and opportunities, and develop data-driven models and reports
• Drive the long-range capacity strategy by integrating considerations for product roadmaps, factory capability, affordability, and forecast uncertainty
• Forecast build plans and contribute to facility designs to meet evolving business and customer requirements
• Partner with supply chain and manufacturing stakeholders to communicate and execute strategies for capital, capacity, layout, and product roadmaps
• Utilize advanced data analysis techniques to extract insights, influence strategies, and present actionable recommendations to leadership
• Develop and communicate requirements for critical systems and business process improvements
• Investigate, design, and optimize production capacity models and layouts to enhance efficiency
• Contribute to the spatial optimization of first-of-a-kind equipment, layout methodologies, and building designs
• Develop execution plans and systems to enable the organization's strategic vision while monitoring performance

Strategic/Development Functional Area Industrial Engineer

• Support and contribute to the setup and optimization of Intel's design environment.
• Assist in automation of tasks, CI/CD practices, and deployment workflows to enhance reliability and scalability.
• Engage in troubleshooting, server capacity planning, and monitoring to maintain system stability.
• Participate in scripting and source control management to streamline operational tasks.
• Provide ticket support and resolve technical issues in collaboration with cross-functional teams.
• Gain exposure to Windows Server infrastructure and related system administration tasks.

Infra, DevOps Intern

Artificial Intelligence

• Supports technical sales by providing product expertise
• Assisting in solution design
• Engaging with customers to address technical requirements
• Collaborates with sales and engineering teams to develop demonstrations
• Responding to customer feedback
• Contributes to the promotion of Intel technologies across various industries
• Learns and applies knowledge
• Builds skills and explores future career opportunities through hands-on experience and projects

AI Technical Solution Specialist Intern

Application Engineer

• define software application solutions across client, cloud, or enterprise thru industry best practices
• recommend design choices
• identify business requirements, functional and system specifications
• configure system settings and options
• plan and execute unit, integration, and acceptance testing
• collaborate with management, product owners, and project managers
• perform pathfinding, survey technologies, participate in standards committees