NVIDIA

Product Designer

• Drive end-to-end UX design for developer and creative tools, from discovery through delivery, shaping experiences that simplify complex workflows
• Generate deep user insights through contextual inquiry, surveys, focus groups, and direct engagement in beta communities
• Translate research findings into intuitive user flows, wireframes, and interactive prototypes, leveraging AI-powered design tools
• Lead usability testing efforts to validate concepts and refine both prototypes and implemented experiences
• Partner closely with engineering and product teams to ensure design intent is preserved through development
• Contribute to scalable, high-quality experiences by maintaining design system consistency and strong usability standards

Senior UX Designer, Cloud User Experience

Full-stack Engineer

• Drive platform bringup, feature enablement, end-to-end software validation, and debug for next-generation NVLink-based GPU and rack-scale systems.
• Develop tools, diagnostics, automation, and infrastructure for system validation, regression testing, and fleet support.
• Lead reliability and MTBI validation through stress testing, telemetry analysis, failure injection, and issue resolution.
• Triage complex software, firmware, networking, and platform issues across validation, deployment, and production environments.
• Collaborate with architecture, hardware, firmware, software, and Customer engagement teams to improve system quality and reliability.
• Build and maintain SRE-style validation infrastructure, including provisioning, monitoring, and operational readiness.
• Create automation, dashboards, runbooks, and debug workflows that improve root-cause analysis and operational efficiency.

Senior Software Engineer – NVLink Rack Scale Stability and Reliability

Technical Program Manager

• Lead the complete implementation of DGX Cloud software initiatives
• Partner with software, infrastructure, product, and platform engineering teams
• Lead initiatives involving Kubernetes-based platforms, cloud-native services
• Define and implement scalable program management processes
• Identify cross-functional dependencies, mitigate risks
• Establish clear success metrics and reporting mechanisms
• Foster a culture of collaboration and continuous improvement
• Report on overall program status, providing insights and recommendations
• Drive organizational alignment and efficiency

Senior Technical Program Manager, DGX Cloud Software Products and Service

Frontend Engineer

• Build and implement critical features for core NGC services
• Play a key role in developing the unified portal for NVIDIA cloud products
• Proactively apply AI tools and agents to boost code quality and system stability
• Drive the evolution of application architecture and development patterns
• Work closely with Product, UX, and Backend teams to create user-friendly UIs
• Participate in all stages of the product lifecycle
• Estimate personal timelines and coordinate work
• Present and/or demonstrate your work/research

Frontend Software Engineer

AI Engineer

• Design, build and optimize agentic AI systems for the CUDA ecosystem
• Co-design agentic system solutions with software, hardware and algorithm teams; influence and adopt new capabilities as they become available
• Develop reproducible, high-fidelity evaluation frameworks covering performance, quality and developer productivity
• Collaborate across the AI stack—from hardware through compilers/toolchains, kernels/libraries, frameworks, distributed training, and inference/serving—and with model/agent teams

Senior AI Engineer, High Performance

Application Engineer

• Provide onsite support for large datacenter deployments of NVIDIA AI solutions.
• Solving complex hardware and deployment issues
• Be a technical specialist on GPU and networking products directly supporting sales account managers, working closely with the team to deliver outstanding AI datacenter solutions.
• Actively establish the technical relationship with our customer’s engineers, management, and architects at focus accounts.
• Identify customer architectures and key product requirements in the enterprise AI market.
• Provide technical and sales training to the direct sales team and channel partners.
• Establish strong relationships and communication channels with internal teams.

Field Application Engineer, New College Graduate

• Collaborate with software and hardware teams to identify high-impact opportunities for applying agentic AI technologies.
• Lead the design, development, and optimization of agentic AI solutions that address challenges in performance, quality and productivity.
• Develop and maintain agentic AI benchmarks to evaluate performance across diverse use cases.

Senior AI Architect, Computer Use Agents

Engineer

• Analyze full‑chip and unit‑level power using internal and industry‑standard RTL and gate‑level power tools, and translate data into concrete design and architectural improvements.
• Develop and productionize power‑aware models and flows, including ML/RL‑based techniques for anomaly detection, dynamic power management, and design‑space exploration.
• Design and train new LLMs that “learn the art” of power analysis from design data, power reports, bug histories, and best practices—so they can:
• Assist engineers in interpreting complex power data
• Propose likely root causes and candidate fixes
• Recommend architectural and micro‑architectural optimizations for power
• Perform comparative power analysis across workloads, products, and design options to identify trends, anomalies, and optimization opportunities that aren’t obvious from first principles alone.
• Partner closely with Architects, Performance, Software, ASIC Design, and Physical Design teams to interpret power data, root‑cause power bugs, and drive fixes and design changes.
• Prototype and evaluate new architectural features in Verilog, with a strong focus on their power and energy implications.
• Automate and scale flows (Python/Perl/C++), and define new pipelines that fast‑track power anomaly detection and close the loop between power data, AI models, and design decisions.
• Apply AI to power optimization: build and deploy data‑driven models—using machine learning, reinforcement learning, data analytics, and custom LLMs—to recommend or automatically tune power‑efficient configurations and policies.

Senior Power Analysis and Optimization Engineer

AI Research Scientist

• Design and architect AI/ML models for quantum error correction and logical operation synthesis
• Develop AI techniques for quantum computing
• Create high-quality, large-scale datasets
• Collaborate with quantum hardware teams

Senior Quantum AI Research Scientist, Applied Research

Designer

• Develop innovative HW, GPU and system designs to extend the state of the art performance and efficiency
• Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA) improvements
• Execute and deliver fully verified, high performance, area and power efficient RTL to achieve design targets
• Collaborate with architects, designers, verification and VLSI teams to craft the industries' top performing GPUs

ASIC Design Efficiency Engineer

Research Scientist

• Developing automated quantum error correcting code discovery protocols and pipelines.
• Using AI and automation to identify novel quantum error correcting codes that achieve high-performance across encoding rate, error suppression, and system realizability.
• Integrating various classical machine learning methods for identifying high-performance code constructions, building bespoke machine learning models tailored to high-performance code design, and developing machine learning-based decoders for topological and/or QLDPC codes, with an emphasis on improving decoding accuracy, scalability, and adaptability to quantum logic settings.
• Building out methods to identify and evaluate high-performance error correcting codes and decoders that directly incorporate hardware constraints of various types of physical systems.
• Analyzing and evaluating the performance of fault-tolerant circuits implementing quantum error correcting logic and memory using analysis and simulation tools.

Quantum Error Correction Research Scientist Intern

Mechanical Engineer

• Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development.
• Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities
• Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions.
• You will build tools and improve existing infrastructure to optimize chip area and speed of execution.

Senior ASIC Floorplan Design Engineer

Data Engineer

• Architect event-driven pipelines (Kafka) and develop new data models that ensure transactional integrity (ACID) for commercial events like invoices, payments, and adjustments
• Automate scalable ETL processes and refactor next-generation data architectures to improve quality, security, and coverage for rapidly growing business demands
• Collaborate across teams to codify business processes into self-measuring systems, debugging complex challenges to ensure the reliability of financial operations

Senior Data Engineer – Financial Transactions, Automation

Solutions Engineer

• Work on our EMEA M&E Solution Architects Team to drive NVIDIA technology adoption at key M&E customers.
• Secure builds in Data Center, Edge, and Cloud Deployments.
• Become a trusted technical advisor for our EMEA-based customers, helping them architect end-to-end agentic pipelines like video analytics, archive analysis, and automated metadata extraction, etc.…
• Lead customer proof-of-concepts (PoCs) using next-generation AI platforms to solve complex M&E use cases, including automated video summarization, agentic and Generative AI workflows for image and video synthesis.
• Design and implement scalable inference solutions that manage the transition from Edge-based processing to massive Cloud clusters, addressing the unique throughput and latency challenges of VLMs and Diffusion models.
• Partner with NVIDIA Engineering, Product, and Sales teams to optimize AI techniques bridging algorithms and systems, providing critical field feedback to influence NVIDIA’s future M&E software and hardware roadmaps.
• Drive adoption of NVIDIA’s Accelerated Compute Platforms, focusing on growing our customers’ capabilities in deploying modern AI architectures, from traditional CNNs to transformer-based generative models.

Solution Architect, Computer Vision – Media and Entertainment

• Guide the system build initiatives encompassing research, composition, and development of RAN algorithms within the realms of 5G/6G PHY and MAC-Scheduler, integrating innovative strategies like AI/ML, Deep Learning, and Raytracing.
• Enable realization of algorithms in a GPU accelerated system, carefully assessing the design and implementation tradeoffs.
• Effectively work with customers and ecosystem partners and support integration, system simulations, performance benchmarking, and optimizations.